Altium

Design Rule Verification Report

Date: 10.09.2021
Time: 16:18:02
Elapsed Time: 00:00:01
Filename: Y:\private\repo\iman-ostovar\Hardware\TofDeck\Deck.PcbDoc
Warnings: 0
Rule Violations: 0

Summary

Warnings Count
Total 0

Rule Violations Count
Clearance Constraint (Gap=0.15mm) (All),(All) 0
Short-Circuit Constraint (Allowed=Yes) (IsPad and not InAnyNet),(IsPad and not InAnyNet) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 0
Modified Polygon (Allow modified: No), (Allow shelved: No) 0
Width Constraint (Min=0.15mm) (Max=0.6mm) (Preferred=0.15mm) (All) 0
Routing Via (MinHoleWidth=0.3mm) (MaxHoleWidth=0.3mm) (PreferredHoleWidth=0.3mm) (MinWidth=0.6mm) (MaxWidth=0.6mm) (PreferedWidth=0.6mm) (All) 0
Power Plane Connect Rule(Direct Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All) 0
Minimum Annular Ring (Minimum=0.15mm) (All) 0
Minimum Annular Ring (Minimum=0.124mm) (Isvia) 0
Minimum Annular Ring (Minimum=0.1mm) (Isvia and TouchesRoom('GAP')) 0
Acute Angle Constraint [Tracks Only] (Minimum=60.000) (All) 0
Hole Size Constraint (Min=0.3mm) (Max=5mm) (All) 0
Hole To Hole Clearance (Gap=0.25mm) (All),(All) 0
Minimum Solder Mask Sliver (Gap=0.1mm) (All),(All) 0
Silk To Solder Mask (Clearance=0.01mm) (IsPad),(All) 0
Silk to Silk (Clearance=0.01mm) (All),(All) 0
Silk to Silk (Clearance=0mm) (OnSilkscreen And (IsText And Not IsDesignator)),(OnSilkscreen And ((IsText And Not IsDesignator) or IsTrack)) 0
Net Antennae (Tolerance=0mm) (All) 0
Board Clearance Constraint (Gap=0mm) (All) 0
Length Constraint (Min=0mm) (Max=36.773mm) (InNet('CLK_0') Or InNet('CLK_1')) 0
Component Clearance Constraint ( Horizontal Gap = 0mm, Vertical Gap = 0mm ) (InComponentClass('NetTie')),(All) 0
Component Clearance Constraint ( Horizontal Gap = 0mm, Vertical Gap = 0mm ) (InComponentClass('Holes, Screws etc.')),(All) 0
Component Clearance Constraint ( Horizontal Gap = 0.152mm, Vertical Gap = 0.152mm ) (All),(All) 0
Component Clearance Constraint ( Horizontal Gap = 0mm, Vertical Gap = 0mm ) (InComponent('TP27')),(InComponent('U2')) 0
Component Clearance Constraint ( Horizontal Gap = 0mm, Vertical Gap = 0mm ) (InComponent('TP25')),(InComponent('TP26')) 0
Component Clearance Constraint ( Horizontal Gap = 0mm, Vertical Gap = 0mm ) (InComponent('U2')),(InComponent('TP23') or InComponent('JP21') or InComponent('JP27') or InComponent('JP24') or InComponent('JP25') or InComponent('JP26')) 0
Height Constraint (Min=0mm) (Max=50mm) (Prefered=12.7mm) (All) 0
Total 0